So basically any engine that doesn't mask bit 3 will be incompatible with the +3. Which is like, most of my engines 
So I guess you better stick to Shiru's engines for now.
Some engines can have pitch issue corrected, although not all of them - find a definition of 'cpuTime', and subtract 7 from the value. If there was a few 'out (#fe),a' lines, add 'and 16' to each of them, and subtract 7 for each one as well.
This is a temporary solution, as it is uncertain if/when we will be fixing the issue. At least I'll add a note for each engine that is currently not compatible with +3, I guess.
]]>So basically any engine that doesn't mask bit 3 will be incompatible with the +3. Which is like, most of my engines So I guess you better stick to Shiru's engines for now.
and #f7 ;11110111b MIC output makes weird noise on +3 before every time it writes to the port and it now sounds pretty normal (but slow, as I obvs messed up with timings).
]]>The ULA chip uses the same pin (28) for all of the MIC socket, EAR socket and the internal speaker, so bits 3 and 4 of an OUT to Port 0xfe will affect bit 6 as read by an IN from Port 0xfe.
tl;dr on a classic speccy different values on bits 3 and 4 produces 4 different distinct levels. However, 1) MIC and EAR are separate lines on the +3 Amstrad Gate Array.
Bit 6 of Port 0xfe of the +2A/+3 does not show the same dependence on what was written to Port 0xfe as it does on the other machines, and always returns 0 if there is no signal.
2) there is no logic for +3 in fuse, that's why it works there.
]]>(updated the attach so the pulses are aligned, wonder why there is the step on the 48K one on the bottom in the middle of the pulse)
]]>I'll try to involve @noelsretrolab as he probably has plenty of it.
]]>Also, have you tried with any other engines?
]]>There are a tap file, a recording, and screenshots from scope.
if you see the attached image (+3 on top and in yellow), it seems like +3 sends extra pulse every time.
P.S.
A guy
A girl ;_;
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